**Vayavya Labs and Tenstorrent are delivering SystemC virtual platforms for Tenstorrent’s security and system management IP using the TvastaaVP platform.

BELAGAVI, India / SANTA CLARA, CA, USA — [October 6, 2026] — Vayavya Labs, a Silicon-to-Systems technology solutions company specializing in hardware-software interface tools, ECU virtualization, and SystemC-based virtual prototyping, announced its role as a virtual platform partner to Tenstorrent, an AI compute company building RISC-V-based processors and systems.

Since 2024, Vayavya Labs has built and delivered SystemC/TLM virtual platforms modeling subsystems of Tenstorrent’s IP portfolio, including security enclave processor (SEP) register complexes, system management controller (SMC) logic, direct memory access (DMA) engines with secure zeroing, boot and fuse infrastructure, and a hardware security module supporting cryptographic operations. These models allow Tenstorrent’s software and validation teams to develop, test, and debug against a virtual representation of the hardware well before physical silicon is ready, helping identify integration issues earlier in the development cycle.

Vayavya Labs built the models on CSML, its SystemC modeling library, providing Tenstorrent with an open, Accellera-compatible modelling path and a commercial variant tuned for its simulation environment. Vayavya Labs used TvastaaVP to accelerate development while maintaining quality controls.

Most recently, Vayavya Labs delivered a phased release of Tenstorrent’s Open Chiplet Harness SEP virtual platform on two independent simulation targets and extended the platform with additional system management controller and harness capabilities.

“Getting software and validation teams working against accurate models before silicon is available provides a meaningful advantage in this industry, and a faster time to market. It’s one of the primary reasons we’ve continued to deepen our work with Vayavya Labs,” said **Aniket Saha, VP of Product Strategy, Tenstorrent**.

“Tenstorrent is exactly the kind of production environment where agentic AI for virtual prototyping has to deliver — production IP, demanding schedules, and high quality bars,” said Sandeep Pendharkar, CTO & VP Engineering, Vayavya Labs. “What started as a single SystemC modeling engagement has grown into a multi-year partnership precisely because the models hold up under that pressure. As Tenstorrent’s RISC-V roadmap continues to expand, we see this as just the beginning of what virtual platforms can do for development velocity.”

Vayavya Labs and Tenstorrent will discuss this collaboration further at **The Open Frontier**, Tenstorrent’s RISC-V ecosystem event in Bengaluru on October 8, 2026, where Sandeep Pendharkar, CTO & VP Engineering at Vayavya Labs, will join the panel “Latest in RISC-V Products & Startups,” moderated by Tenstorrent’s Divyang Agrawal, VP of RISC-V Cores/IP.