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Month: October 2022
Our AVB End Point Demo on Synopsys DW Ethernet Controller
OpenAvnu
The OpenAvnu project is sponsored by the Avnu Alliance. The intent is to provide components for building AVB/TSN systems.
Intel created the OpenAvnu repository to encourage collaborative source code development for AVB/TSN technology enabling.
TSN standards demonstration in automotive ethernet network – 802.1Qbv and 802.1Qbu
Vayavya Labs launches OpenHSI™ initiative
Portable Stimulus Working Group
Portable Stimulus Standard 2.0 ready for download
The Portable Test and Stimulus Standard (PSS) defines a specification to create a single representation of stimulus and test scenarios usable by a variety of users across many levels of integration under different configurations. This representation facilitates the generation of diverse implementations of a scenario that run on a variety of execution platforms, including, but not necessarily limited to, simulation, emulation, FPGA prototyping, and post-silicon. With this standard, users can specify a set of behaviours once and observe consistent behaviour across multiple implementations.
Dealing with Programmable IP: Where the Rubber Meets the PSS Deployment Road
We are conducting a workshop at DVCON 2020 US – Mar 02, 1:45pm – 3:15pm at DoubleTree Hotel, San Jose, CA.
Using Hardware/Software Interface (HSI) based automation in your verification flow offers immediate and substantial benefits. The use of automation cuts downtime in developing device drivers improves quality and promotes reuse of the stimulus model.
This tutorial offers an in-depth view of Hardware/Software Interface (HSI) specification, software stacks, and application to verification of a typical SoC.
OPEN Alliance SIG
DDGEN Demo – What is DDGEN? – Part 1
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DDGEN Demo – What is DDGEN? – Part 2
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DDGEN Demo – USB3.0 Driver
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