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Product: EDA tool for Architectural analysis of SoC design

Vayavya Labs contribution:

Development of system models for on-chip infrastructures like Bus interfaces SystemC consultancy Enhancement and porting of IP models to SystemC based design Integration and performance fine tuning of IP models Contribution to enhancing the design environment including, development of module for logging signal values in Value Change Dump (VCD) format and automation of regression tests and test report generation Methodology improvement, including suggestions and implementation to improve simulation of sequential circuits

Posted in: Services