News & Events

Vayavya Labs at DevCon – Europe 2017

Panel: An Introduction to the Accellera Portable Stimulus Standard
When: October 16, 9:30am - 11:00am
Where: Forum 6 | Holiday Inn Munich City Centre, Munich, Germany

Learn how to use the standard to specify and verify realistic system-level behaviour, and leave the tutorial educated on the value of portable stimulus and the basics of the standard. Our Principal Architect, Karthick Gururaj, is one of the speakers at the tutorial.
By |October 26th, 2017|News|Comments Off on Vayavya Labs at DevCon – Europe 2017

Vayavya Labs at DVCon2015

Panel: Importance of Hardware-Software Interface for Portable Stimulus
Venue: 10 Sep 2015 @ 15:30

Learn from our Principal Architect, Karthick Gururaj on the importance of Hardware-Software Interface for Portable Stimulus at DVCON India 2015. Karthick will be talking about this in the tutorial on Portable Stimulus being held on thursday @ 15:30 in the Grand Ball Room, Leela Palace Hotel
By |September 8th, 2015|News|Comments Off on Vayavya Labs at DVCon2015

Vayavya Labs at DVCon 2014

Panel: Is software a missing piece in verification?
Venue: 5th March,2014, Double Tree Hotel, San Jose, CA

Sandeep Pendharkar, VP and Head Product Engineering at Vayavya Labs joins his co-panelists discussing the importance of software in SoC verification flow. Traditionally software has not been an integral part of SoC verification flow. However factor like increased design complexity of modern SoC, standardization of SoC peripherals along with their very high programmability and ever shrinking time-to-market are pushing the envelop of SoC verification. Using software, which eventually forms the REAL world product, during verification is gaining traction. Be part of this event to learn from panelists drawn from industry experts and the audience.
By |February 12th, 2014|News|Comments Off on Vayavya Labs at DVCon 2014

Can Hardware-Assisted Verification Save SoC Realization Time?

A blog “Can Hardware-Assisted Verification Save SoC Realization Time?” written by our Senior Architect, Srivatsan Raghavan, was featured in EETimes. Blog discusses how SoC integration complexity is being addressed by hardware-assisted verification technologies and the challenges posed in adopting them.

To view the full article please click - Can Hardware-Assisted Verification Save SoC Realization Time?
By |November 22nd, 2013|News|Comments Off on Can Hardware-Assisted Verification Save SoC Realization Time?

Vayavya Labs @ Google DevFest

Vayavya Labs participated in the Google DevFest organized by the Belgaum chapter of Google Developer Group , a 2 day event held at Gogte Institute of Technology, Belgaum.

Vayavya Engineers  - Rayagond Kokatnur and Shrinivas Nagaraddi spoke at the event and encouraged the students to be a part of the Open Source community. They explained about the working of Linux Open Source Project, and invited the students to contribute to any open source projects of their choice so as to bring themselves closer to the Industry at large.

By |November 11th, 2013|News|Comments Off on Vayavya Labs @ Google DevFest

Essential Abstractions

EETimes featured a blog “Essential Abstractions” by Srivatsan Raghavan, our Senior Architect. This blog talks about how the standards and abstractions have become essential for the software side of the design industry, especially the segment where low-level software is developed to enable an IP for both verification and system-software. To view the full article please click - Essential Abstractions.
By |October 30th, 2013|News|Comments Off on Essential Abstractions

Vayavya Labs demonstrates GStreamer plugins based on AVB technology

AVB or Audio Video Bridging is a promising technology and standard aimed at delivering the multimedia content in more controlled, guaranteed and deterministic manner over a network. This new standard or a set of standards has been mainly is mainly specified by IEEE, and promoted by industry consortiums like AVNU ( The technology finds major acceptance in automotive infotainment, vehicular networks, and professional AV systems. Early adopters include leading switch makers, and many Audio Video equipment makers. Vayavya recently demonstrated the technology through implementation of GStreamer plugins for Linux based on OpenAVB using the DesignWare® Ethernet QOS V4.0 core from Synopsys. The two plugins – a ‘Talker Plugin’ and a ‘Listener Plugin’ on the lines of a 'sink' and a 'source' respectively, can be used as plug-n-play components for transmission and reception of AVB traffic. The plugins use the key AVB stack components like gPTP, CBS, MAAP and SRP. GStreamer based media applications can make use of the plugins for transport of multimedia streams over Ethernet, much like the way they use either TCP plugins or UDP plugins. Vayavya Labs demonstrated live (real-time) audio and video transmission scenarios - both raw streams with time stamping and TS streams over AVB enabled Ethernet interfaces. avb1 We envisage that the plugins and the work around it to gain wider acceptance in consumer electronics applications, which are in need of dedicated hi-bandwidth like video conferencing, among others.
By |September 20th, 2013|News|Comments Off on Vayavya Labs demonstrates GStreamer plugins based on AVB technology

Vayavya’s SOCX-Verification tool and competition

EE Journal carries a detailed article on Vayavya's SOCX-Verification tool and competition. As the author puts it "New kid in town" is surely looking for a pole position in emerging domain of software driven verification. To view the full article, click: Software Is In Style New C-Level SoC Verification Options
By |August 7th, 2013|News|Comments Off on Vayavya’s SOCX-Verification tool and competition

Let’s Get System-Level Functional Verification Under Control

EETimes featured an article “Let’s Get System-Level Functional Verification Under Control” by Srivatsan Raghavan, our Senior Architect. The article talks about the problems faced by the Silicon Industry with respect to Silicon Verification, and offers possible solutions and methodology required for automation of Verification Scenarios based on Verification Intent. To view the full article, click: “Let’s Get System-Level Functional Verification Under Control”
By |July 25th, 2013|News|Comments Off on Let’s Get System-Level Functional Verification Under Control

Ricoh licenses Vayavya’s DDGen tool for automated device driver generation

Kanagawa, Japan – June 3, 2013 – Ricoh Company Ltd., a global leader in imaging devices and industry products, today announced that they have entered a licensing agreement with Vayavya Labs Pvt. Ltd. for using DDGen to accelerate development of device drivers. DDGen generates device drivers for different operating systems from a formal specification of the peripheral’s programming specification. Ricoh will be using DDGen for different peripherals present in their products – including USB host/device controllers, network controller, flash memory devices, etc. The licensing engagement follows a positive recommendation from an earlier study by Ricoh that looked into various aspects of the DDGen methodology – including quality of the generated code. Naoya Morita, Embedded Platform Development Department at Ricoh Company, Ltd., said, “As a system provider, we would like to have every IP be ready to be incorporated into the systems. In order to establish such state, it is essential to have a tool like DDGen, which enables us to automatically generate device drivers based on data such as IP-XACT (with extensions), and to manage all IPs with IP-XACT. We have been searching some tools like DDGen to cut down cost, time and effort while meeting the time-to-market demands. We are encouraged by the early results shown by DDGen.” RK Patil, Vayavya Labs CEO said, “As programmable IPs in SoC design increase by numbers and complexity, the delivery of embedded software as part of the system becomes a bottleneck. With proliferation of multiple embedded operating systems, SoC firms face the challenge of delivery for device drivers and multiple BSPs. An automation tool like DDGen can help in bringing productivity improvements by 10x for device drivers and BSP. We are happy to see a major Embedded Platform vendor like Ricoh endorsing the tools benefits.”

About Ricoh Company Ltd.

Ricoh Company, Ltd., is a global leader in sophisticated office solution. Products include copiers, multifunctional and other printers, facsimiles, duplicators and related consumables and services, as well as digital cameras and advanced electronic devices. Ricoh is rapidly building a solid presence worldwide as a provider of comprehensive solutions that help customers enhance their office productivity and revolutionize their workflow. For more details about Ricoh and its products visit

About Vayavya Labs Pvt Ltd.

Vayavya Labs Pvt. Ltd. a privately held and Indian Angel Network (IAN) venture funded Electronic System Designs Tools Company. The company re-defines the HardwareSoftware co-design methodology to drive down the TIME, EFFORT and COSTS involved in SoC/ASIC roll-out. Vayavya Labs delivers a high level formal set of design specifications and automation tools that help in bridging the Hardware-Software design flows. Founded in 2006, Vayavya Labs serves the global SoC and Embedded system design firms with its two development centers in India and sales offices in Japan and USA. For more details about the company and its products visit

By |June 4th, 2013|News|Comments Off on Ricoh licenses Vayavya’s DDGen tool for automated device driver generation