Vayavya Labs

30 Jan 2013: Vayavya Labs delivers Linux 3.0 driver for Synopsys Ethernet QoS v4.0 Controller using DDGEN

vayavyalabs — Wed, 30 Jan 2013 06:40:18 +0000

Vayavya Labs recently delivered a Linux 3.0 device driver for Synopsys Ethernet QoS v4.0. This driver was generated using our flagship device driver synthesis tool DDGEN. The basic driver consisting of single channel DMA and ring mode support will be available as a reference driver along with the IP. Please contact us for a comprehensive driver consisting of the following advanced features:

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Multi-channel DMA
VLAN Tag detection Energy Efficient Ethernet
TCP segmentation offloading
Audio Video bridging
Large receive offloading
Jumbo Frame handling
Precision Timing Protocol.

6 Jul 2012: Vayavya Labs focuses on better productivity at a lower cost

vayavyalabs — Mon, 09 Jul 2012 06:38:41 +0000

Vayavya Labs featured in Economic Times article “Lessons from 50 start-ups”. Find more details here.

24 May 2012: Vayavya Labs mentioned in BLOG of ESL coverage at DAC-2012 by Brian Bailey

vayavyalabs — Thu, 24 May 2012 06:12:30 +0000

Vayavya Labs provides leading-edge solutions to accelerate embedded software and firmware development. Its patented device-driver generation technology provides a 10x productivity boost by synthesizing driver code from specs, enabling silicon providers and system vendors to ensure timely delivery of the necessary OS ports and board support packages (BSPs). The programmatic spec capture can be leveraged to define a common pre-silicon to post-silicon validation methodology to streamline verification, lowering R&D cost. Vayavya Labs was recently included on the EE Times Silicon 60. They will demonstrate their Accelerated BSP Development methodology, featuring device-driver synthesis, as well as their System-Level Validation solution.

DAC-2012, Booth #710
http://www.eetimes.com/electronics-blogs/other/4373629/Gearing-Up-for-DAC—Above-RTL?Ecosystem=eda-design

12 May 2012: Vayavya Labs @ DAC 2012

vayavyalabs — Fri, 11 May 2012 10:32:50 +0000

San Jose, CA, May-12, 2012: Vayavya Labs, a provider of leading edge solutions that accelerate embedded software and firmware development, announced that it will be presenting its Accelerated BSP Methodology at DAC 2012. The company will also unveil its System-level Validation solution at the show. Both these solutions leverage Vayavya Labs’ patented device driver generation (DDGen) technology.

The DDGen technology provides a 10x productivity boost by synthesizing driver code from specs, thereby enabling silicon providers and system vendors to ensure timely delivery of the necessary OS ports and BSP’s to their customers. The programmatic spec capture can also be leveraged to define a common pre-silicon to post-silicon validation methodology which helps streamline verification, thereby lowering R&D cost.

Vayavya Labs will be presenting these solutions at their booth (#710) at the Moscone Center in San Francisco from Jun 4-6. For more details on DAC 2012, please CLICK HERE.

25 Mar 2012: ESC session on SD/MMC Command Test Module

vayavyalabs — Tue, 27 Mar 2012 09:42:57 +0000

One of our key technical architects and linux experts, Pavitra will talk on a post-silicon validation framework for SD/SDIO/MMC host controllers. This framework enables a user to validate each protocol command individually..

Find more details at:
http://www.ubmdesign.com/conference/tracks/
http://www.ubmdesign.com/sessions/esc

14 Nov 2011: Vayavya Labs appoints Kazuhiro Honjo as consultant Director Sales for Japan.

vayavyalabs — Mon, 14 Nov 2011 06:53:38 +0000

Japan market has been a leading adopter of emerging technologies and design flows in semiconductor and EDA domain. With increased focus on System-Realization and time-to-market, Vayavya’s embedded software synthesis tools and methodologies are bound to attract the attention of early adopters.

Kazuhiro Honjo-san brings with him an extensive EDA sales and marketing experience in Japan and leads our efforts in reaching the target customers.

07 Nov 2011: Model based design methodology and TLMCentral initiative…

vayavyalabs — Mon, 07 Nov 2011 07:54:50 +0000

Vayavya Joins the TLMCentral initiative by Synopsys, an industry wide web-portal that offers a unique aggregation point for transaction-level models. While the aim of Model Based approach is to speed up software delivery, Vayavya’s tools further this by helping automation of Embedded Software components.

http://vayavyalabs.com/blog/2011/11/08/model-based-design-methodology-and-tlmcentral-initiative
http://www.tlmcentral.com/about-tlmcentral/

24 Jul 2011: Indian Angel Network invests $1 million in Vayavya Labs.

vayavyalabs — Sun, 24 Jul 2011 12:46:17 +0000

Indian Angel Network, India’s largest national network of business angels investing in start-ups, has invested $ 1 million in Vayavya Labs. This will provide a major boost for the expansion plans we had for our System Design Automation Tools and strengthens our sales and marketing efforts.

The TIE Bangalore played a major role in bringing about this deal. We appreciate the support and enthusiasm of Mr. Sharad Sharma who said, “Vayavya tools play a pivotal role in adding value by cutting down development, testing and debugging time at customer end thereby meeting the goal for go-to-market.

Vayavya to present at IP-09 France(Grenoble) a paper on “DDGEN: An Automated Device Driver

dotcord — Tue, 24 May 2011 11:18:59 +0000

Vayavya Labs is an IIM-B, NSRCEL incubatee company

dotcord — Tue, 24 May 2011 11:09:36 +0000